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How to make makefile for c program with parameters
How to make makefile for c program with parameters







how to make makefile for c program with parameters

$ gcc -o greatmake mainfunc.c func1.c -I. Ideally, we execute the following command to build the project:

how to make makefile for c program with parameters

Now, let’s create a makefile that compiles the project files to create an executable file in the current directory. Our header files looks like the following: We create a function that prints a welcome message and includes an external header file in our project. The first example is a simple C project with two C files and a header file. Thus, a prerequisite is not required in such a case as no recompilation of the target is required. In this case, the rule deletes all the files which contains a *.o extension. For instance, if you have a makefile to delete the intermediate files which are created when building a file, such a rule won’t have any prerequisite. The rule specifies that for you to make the file to generate the welcome file, we must run the command which uses the great.c as the input to create the welcome file.Īgain, not all rules have a prerequisite. So, in such a makefile, “ make” uses the gcc -o welcome great.c as a rule to build and manage the project. Note that make uses the first rule in the makefile as the default rule. The provided makefile consists of one rule in the recipe. Here’s an example of a simple makefile which highlights the target, prerequisites, and recipe: The recipe acts as a series of shell commands starting with a tab character. A tab space precedes each new recipe line, and the editor raises an error if you miss on adding the tab character. The recipe can contain different commands on the same or different lines.

how to make makefile for c program with parameters

A target can depend on multiple prerequisites.Ī recipe is an action or command that is carried out by “ make” to recompile the target whenever the prerequisite changes. Ideally, the target highlights the file to be built once we execute the “ make” command.Ī prerequisite represents the file to be used as the input for creating the target. The target can depend on the prerequisites and can also be an action to be carried out. A makefile has three key components: target, prerequisite, and recipe.Ī target represents the file that the “ make” command can generate. GNU Make reads the makefile of a project to determine what it should do to build and manage the project. Today’s post provides a hands-on guide to understanding everything about GNU Make. It determines the sections of a program that must be recompiled after a given action and offers the commands to recompile the sections. GNU Make is designed for handling large projects. In that case, the GNU Make locates the makefile for that project as the file specifies the required dependencies between various files in the given project and the commands which are required to build the project. GNU Make is an essential tool for building and managing the projects, especially where the project contains different files which are built using different tools.









How to make makefile for c program with parameters